CWE-1260
Weakness AllowedImproper Handling of Overlap Between Protected Memory Ranges
Abstraction: Base · Status: Stable
The product allows address regions to overlap, which can result in the bypassing of intended memory protection.
Isolated memory regions and access control (read/write) policies are used by hardware to protect privileged software. Software components are often allowed to change or remap memory region definitions in order to enable flexible and dynamically changeable memory management by system software.
Mapping guidance
This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
Modes of introduction
Such issues could be introduced during hardware architecture and design or implementation and identified later during the Testing phase.
Detection methods
Manual Analysis
Create a high privilege memory block of any arbitrary size. Attempt to create a lower privilege memory block with an overlap of the high privilege memory block. If the creation attempt works, fix the hardware. Repeat the test.
Effectiveness: High
Notes
Maintenance
As of CWE 4.6, CWE-1260 and CWE-1316 are siblings under view 1000, but CWE-1260 might be a parent of CWE-1316. More analysis is warranted.
Content history
suggested content improvements
suggested observed examples
suggested demonstrative example
suggested demonstrative example
updated Demonstrative_Examples, Description, Modes_of_Introduction, Related_Attack_Patterns
updated Maintenance_Notes
updated Demonstrative_Examples, Description, Detection_Factors, Maintenance_Notes, Observed_Examples, Relationships, Weakness_Ordinalities
updated Applicable_Platforms, Related_Attack_Patterns
updated Applicable_Platforms
updated Related_Attack_Patterns
updated Relationships
updated Demonstrative_Examples, Mapping_Notes, References
updated Relationships
updated Common_Consequences, Demonstrative_Examples, Description
35 vulnerabilities reference this CWE, most recent first.
CVE-2026-76668 (GCVE-0-2026-76668)
Vulnerability from cvelistv5 – Published: 2026-10-15 06:33 – Updated: 2026-10-15 14:55- CWE-1260 - Improper handling of overlap between protected memory ranges
| Vendor | Product | Version | |
|---|---|---|---|
| Hewlett Packard Enterprise | HPE NonStop Kernel |
Affected:
T9050L02^BBP
Affected: T9050L02^BBS |
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CVE-2026-20760 (GCVE-0-2026-20760)
Vulnerability from cvelistv5 – Published: 2026-08-11 16:25 – Updated: 2026-08-12 15:47- Escalation of Privilege
- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
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| n/a | Intel(R) Processors |
Affected:
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CVE-2025-54503 (GCVE-0-2025-54503)
Vulnerability from cvelistv5 – Published: 2026-11-10 21:44 – Updated: 2026-11-10 21:44- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
| Vendor | Product | Version | |
|---|---|---|---|
| AMD | AMD EPYC™ 9005 Series Processors |
Unaffected:
TurinPI_1.0.0.A
|
|
| AMD | AMD EPYC™ Embedded 9005 Series Processors |
Unaffected:
EmbeddedTurinPI_SP5_1004
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CVE-2025-31936 (GCVE-0-2025-31936)
Vulnerability from cvelistv5 – Published: 2026-08-11 16:28 – Updated: 2026-08-12 14:46- Escalation of Privilege
- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
| Vendor | Product | Version | |
|---|---|---|---|
| n/a | Intel(R) Xeon(R) 6 processors when using Intel(R) TDX |
Affected:
See references
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CVE-2025-29948 (GCVE-0-2025-29948)
Vulnerability from cvelistv5 – Published: 2026-02-10 19:07 – Updated: 2026-02-11 15:08- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
| Vendor | Product | Version | |
|---|---|---|---|
| AMD | AMD EPYC™ 9005 Series Processors |
Unaffected:
TurinPI 1.0.0.6
|
|
| AMD | AMD EPYC™ Embedded 9005 Series Processors |
Unaffected:
EmbTurinPI-SP5_1.0.0.1
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CVE-2025-22889 (GCVE-0-2025-22889)
Vulnerability from cvelistv5 – Published: 2025-08-12 16:58 – Updated: 2026-11-03 22:02- Escalation of Privilege
- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
| Vendor | Product | Version | |
|---|---|---|---|
| n/a | Intel(R) Xeon(R) 6 processor with Intel(R) TDX |
Affected:
See references
|
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Vulnerability from cvelistv5 – Published: 2026-02-10 19:12 – Updated: 2026-02-10 20:57- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
| Vendor | Product | Version | |
|---|---|---|---|
| AMD | AMD EPYC™ 9005 Series Processors |
Unaffected:
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|
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CVE-2022-27813 (GCVE-0-2022-27813)
Vulnerability from cvelistv5 – Published: 2023-10-19 09:34 – Updated: 2024-08-03 05:33- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
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CVE-2019-25602 (GCVE-0-2019-25602)
Vulnerability from cvelistv5 – Published: 2026-03-22 13:38 – Updated: 2026-03-23 15:30- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
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CVE-2019-25592 (GCVE-0-2019-25592)
Vulnerability from cvelistv5 – Published: 2026-03-22 13:38 – Updated: 2026-03-23 16:04- CWE-1260 - Improper Handling of Overlap Between Protected Memory Ranges
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"assignerShortName": "VulnCheck",
"cveId": "CVE-2019-25592",
"datePublished": "2026-03-22T13:38:30.411Z",
"dateReserved": "2026-03-22T12:53:14.849Z",
"dateUpdated": "2026-03-23T16:04:17.974Z",
"state": "PUBLISHED"
},
"dataType": "CVE_RECORD",
"dataVersion": "5.2"
}
Mitigation
Ensure that memory regions are isolated as intended and that access control (read/write) policies are used by hardware to protect privileged software.
Mitigation
- For all of the programmable memory protection regions, the memory protection unit (MPU) design can define a priority scheme.
- For example: if three memory regions can be programmed (Region_0, Region_1, and Region_2), the design can enforce a priority scheme, such that, if a system address is within multiple regions, then the region with the lowest ID takes priority and the access-control policy of that region will be applied. In some MPU designs, the priority scheme can also be programmed by trusted software.
- Hardware logic or trusted firmware can also check for region definitions and block programming of memory regions with overlapping addresses.
- The memory-access-control-check filter can also be designed to apply a policy filter to all of the overlapping ranges, i.e., if an address is within Region_0 and Region_1, then access to this address is only granted if both Region_0 and Region_1 policies allow the access.
CAPEC-456: Infected Memory
An adversary inserts malicious logic into memory enabling them to achieve a negative impact. This logic is often hidden from the user of the system and works behind the scenes to achieve negative impacts. This pattern of attack focuses on systems already fielded and used in operation as opposed to systems that are still under development and part of the supply chain.
CAPEC-679: Exploitation of Improperly Configured or Implemented Memory Protections
An adversary takes advantage of missing or incorrectly configured access control within memory to read/write data or inject malicious code into said memory.