{"vulnerability": "CVE-2022-33745", "sightings": [{"uuid": "c653011c-f13f-432b-a50e-b1ad88382508", "vulnerability_lookup_origin": "1a89b78e-f703-45f3-bb86-59eb712668bd", "author": "9f56dd64-161d-43a6-b9c3-555944290a09", "vulnerability": "CVE-2022-33745", "type": "seen", "source": "https://t.me/cibsecurity/46976", "content": "\u203c CVE-2022-33745 \u203c\n\ninsufficient TLB flush for x86 PV guests in shadow mode For migration as well as to work around kernels unaware of L1TF (see XSA-273), PV guests may be run in shadow paging mode. To address XSA-401, code was moved inside a function in Xen. This code movement missed a variable changing meaning / value between old and new code positions. The now wrong use of the variable did lead to a wrong TLB flush condition, omitting flushes where such are necessary.\n\n\ud83d\udcd6 Read\n\nvia \"National Vulnerability Database\".", "creation_timestamp": "2022-07-26T16:34:14.000000Z"}]}