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    <title>Most recent entries from all</title>
    <link>https://vulnerability.circl.lu</link>
    <description>Contains only the most 10 recent entries.</description>
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    <lastBuildDate>Sun, 11 Oct 2026 15:16:10 +0000</lastBuildDate>
    <item>
      <title>BELL-CVE-2026-98248</title>
      <link>https://vulnerability.circl.lu/vuln/bell-cve-2026-98248</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Alpaquita:23: linux-lts, Alpaquita:25: linux-lts, Alpaquita:stream: linux-lts&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Alpaquita:23: linux-lts, Alpaquita:25: linux-lts, Alpaquita:stream: linux-lts&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://vulnerability.circl.lu/vuln/bell-cve-2026-98248</guid>
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    <item>
      <title>fkie_cve-2026-98248</title>
      <link>https://vulnerability.circl.lu/vuln/fkie_cve-2026-98248</link>
      <description>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;arm64: percpu: Fix LSE operations on {8,16}-bit types&lt;/p&gt;
&lt;p&gt;The assembly for __percpu_##name##_case_##sz() and
__percpu_##name##_return_case_##sz() doesn&amp;#39;t use the &amp;#39;sfx&amp;#39; macro
argument to form the LSE instruction. Without &amp;#39;sfx&amp;#39;, a W register
argument will imply a 32-bit memory location, and consequently
{8,16}-bit ops will erroneously read and write 32 bits of memory when
the LSE instruction is used.&lt;/p&gt;
&lt;p&gt;Fix this by appending &amp;#39;sfx&amp;#39; to &amp;#39;op_lse&amp;#39; to LSE instruction. It is not
necessary (and not valid) to append &amp;#39;sfx&amp;#39; to &amp;#39;op_llsc&amp;#39;, as &amp;#39;op_llsc&amp;#39; is
a register-register operation which does not access memory (and does not
take a size suffix).&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;arm64: percpu: Fix LSE operations on {8,16}-bit types&lt;/p&gt;
&lt;p&gt;The assembly for __percpu_##name##_case_##sz() and
__percpu_##name##_return_case_##sz() doesn&amp;#39;t use the &amp;#39;sfx&amp;#39; macro
argument to form the LSE instruction. Without &amp;#39;sfx&amp;#39;, a W register
argument will imply a 32-bit memory location, and consequently
{8,16}-bit ops will erroneously read and write 32 bits of memory when
the LSE instruction is used.&lt;/p&gt;
&lt;p&gt;Fix this by appending &amp;#39;sfx&amp;#39; to &amp;#39;op_lse&amp;#39; to LSE instruction. It is not
necessary (and not valid) to append &amp;#39;sfx&amp;#39; to &amp;#39;op_llsc&amp;#39;, as &amp;#39;op_llsc&amp;#39; is
a register-register operation which does not access memory (and does not
take a size suffix).&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://vulnerability.circl.lu/vuln/fkie_cve-2026-98248</guid>
    </item>
    <item>
      <title>GHSA-p97v-423w-mpcq</title>
      <link>https://vulnerability.circl.lu/vuln/ghsa-p97v-423w-mpcq</link>
      <description>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;arm64: percpu: Fix LSE operations on {8,16}-bit types&lt;/p&gt;
&lt;p&gt;The assembly for __percpu_##name##_case_##sz() and
__percpu_##name##_return_case_##sz() doesn&amp;#39;t use the &amp;#39;sfx&amp;#39; macro
argument to form the LSE instruction. Without &amp;#39;sfx&amp;#39;, a W register
argument will imply a 32-bit memory location, and consequently
{8,16}-bit ops will erroneously read and write 32 bits of memory when
the LSE instruction is used.&lt;/p&gt;
&lt;p&gt;Fix this by appending &amp;#39;sfx&amp;#39; to &amp;#39;op_lse&amp;#39; to LSE instruction. It is not
necessary (and not valid) to append &amp;#39;sfx&amp;#39; to &amp;#39;op_llsc&amp;#39;, as &amp;#39;op_llsc&amp;#39; is
a register-register operation which does not access memory (and does not
take a size suffix).&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;arm64: percpu: Fix LSE operations on {8,16}-bit types&lt;/p&gt;
&lt;p&gt;The assembly for __percpu_##name##_case_##sz() and
__percpu_##name##_return_case_##sz() doesn&amp;#39;t use the &amp;#39;sfx&amp;#39; macro
argument to form the LSE instruction. Without &amp;#39;sfx&amp;#39;, a W register
argument will imply a 32-bit memory location, and consequently
{8,16}-bit ops will erroneously read and write 32 bits of memory when
the LSE instruction is used.&lt;/p&gt;
&lt;p&gt;Fix this by appending &amp;#39;sfx&amp;#39; to &amp;#39;op_lse&amp;#39; to LSE instruction. It is not
necessary (and not valid) to append &amp;#39;sfx&amp;#39; to &amp;#39;op_llsc&amp;#39;, as &amp;#39;op_llsc&amp;#39; is
a register-register operation which does not access memory (and does not
take a size suffix).&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://vulnerability.circl.lu/vuln/ghsa-p97v-423w-mpcq</guid>
    </item>
    <item>
      <title>msrc_CVE-2026-98248 — arm64: percpu: Fix LSE operations on {8,16}-bit types</title>
      <link>https://vulnerability.circl.lu/vuln/msrc_cve-2026-98248</link>
      <description>msrc_CVE-2026-98248</description>
      <guid isPermaLink="false">https://vulnerability.circl.lu/vuln/msrc_cve-2026-98248</guid>
    </item>
    <item>
      <title>UBUNTU-CVE-2026-98248</title>
      <link>https://vulnerability.circl.lu/vuln/ubuntu-cve-2026-98248</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Ubuntu:16.04:LTS: linux-hwe-edge, Ubuntu:18.04:LTS: linux-aws-5.0, Ubuntu:18.04:LTS: linux-aws-5.3, Ubuntu:Pro:18.04:LTS: linux-aws-5.4, Ubuntu:18.04:LTS: linux-azure, Ubuntu:18.04:LTS: linux-azure-5.3, Ubuntu:Pro:18.04:LTS: linux-azure-5.4, Ubuntu:18.04:LTS: linux-azure-edge, Ubuntu:18.04:LTS: linux-gcp, Ubuntu:18.04:LTS: linux-gcp-5.3 and 219 more&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved: arm64: percpu: Fix LSE operations on {8,16}-bit types The assembly for __percpu_##name##_case_##sz() and __percpu_##name##_return_case_##sz() doesn&amp;#39;t use the &amp;#39;sfx&amp;#39; macro argument to form the LSE instruction. Without &amp;#39;sfx&amp;#39;, a W register argument will imply a 32-bit memory location, and consequently {8,16}-bit ops will erroneously read and write 32 bits of memory when the LSE instruction is used. Fix this by appending &amp;#39;sfx&amp;#39; to &amp;#39;op_lse&amp;#39; to LSE instruction. It is not necessary (and not valid) to append &amp;#39;sfx&amp;#39; to &amp;#39;op_llsc&amp;#39;, as &amp;#39;op_llsc&amp;#39; is a register-register operation which does not access memory (and does not take a size suffix).&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Ubuntu:16.04:LTS: linux-hwe-edge, Ubuntu:18.04:LTS: linux-aws-5.0, Ubuntu:18.04:LTS: linux-aws-5.3, Ubuntu:Pro:18.04:LTS: linux-aws-5.4, Ubuntu:18.04:LTS: linux-azure, Ubuntu:18.04:LTS: linux-azure-5.3, Ubuntu:Pro:18.04:LTS: linux-azure-5.4, Ubuntu:18.04:LTS: linux-azure-edge, Ubuntu:18.04:LTS: linux-gcp, Ubuntu:18.04:LTS: linux-gcp-5.3 and 219 more&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved: arm64: percpu: Fix LSE operations on {8,16}-bit types The assembly for __percpu_##name##_case_##sz() and __percpu_##name##_return_case_##sz() doesn&amp;#39;t use the &amp;#39;sfx&amp;#39; macro argument to form the LSE instruction. Without &amp;#39;sfx&amp;#39;, a W register argument will imply a 32-bit memory location, and consequently {8,16}-bit ops will erroneously read and write 32 bits of memory when the LSE instruction is used. Fix this by appending &amp;#39;sfx&amp;#39; to &amp;#39;op_lse&amp;#39; to LSE instruction. It is not necessary (and not valid) to append &amp;#39;sfx&amp;#39; to &amp;#39;op_llsc&amp;#39;, as &amp;#39;op_llsc&amp;#39; is a register-register operation which does not access memory (and does not take a size suffix).&lt;/p&gt;</content:encoded>
      <guid isPermaLink="false">https://vulnerability.circl.lu/vuln/ubuntu-cve-2026-98248</guid>
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