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  <updated>2026-09-29T08:46:39.447721+00:00</updated>
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  <entry>
    <id>https://vulnerability.circl.lu/vuln/cve-2025-40222</id>
    <title>CVE-2025-40222 — tty: serial: sh-sci: fix RSCI FIFO overrun handling</title>
    <updated>2026-09-29T08:46:39.449414+00:00</updated>
    <content type="xhtml">
      <div xmlns="http://www.w3.org/1999/xhtml"><p><strong>Affected:</strong> Linux</p>
<p>In the Linux kernel, the following vulnerability has been resolved:</p>
<p>tty: serial: sh-sci: fix RSCI FIFO overrun handling</p>
<p>The receive error handling code is shared between RSCI and all other
SCIF port types, but the RSCI overrun_reg is specified as a memory
offset, while for other SCIF types it is an enum value used to index
into the sci_port_params-&gt;regs array, as mentioned above the
sci_serial_in() function.</p>
<p>For RSCI, the overrun_reg is CSR (0x48), causing the sci_getreg() call
inside the sci_handle_fifo_overrun() function to index outside the
bounds of the regs array, which currently has a size of 20, as specified
by SCI_NR_REGS.</p>
<p>Because of this, we end up accessing memory outside of RSCI's
rsci_port_params structure, which, when interpreted as a plat_sci_reg,
happens to have a non-zero size, causing the following WARN when
sci_serial_in() is called, as the accidental size does not match the
supported register sizes.</p>
<p>The existence of the overrun_reg needs to be checked because
SCIx_SH3_SCIF_REGTYPE has overrun_reg set to SCLSR, but SCLSR is not
present in the regs array.</p>
<p>Avoid calling sci_getreg() for port types which don't use standard
register handling.</p>
<p>Use the ops-&gt;read_reg() and ops-&gt;write_reg() functions to properly read
and write registers for RSCI, and change the type of the status variable
to accommodate the 32-bit CSR register.</p>
<p>sci_getreg() and sci_serial_in() are also called with overrun_reg in the
sci_mpxed_interrupt() interrupt handler, but that code pat…</p></div>
    </content>
    <link href="https://vulnerability.circl.lu/vuln/cve-2025-40222"/>
  </entry>
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