Max CVSS | 6.1 | Min CVSS | 1.9 | Total Count | 2 |
ID | CVSS | Summary | Last (major) update | Published | |
CVE-2020-25596 | 2.1 |
An issue was discovered in Xen through 4.14.x. x86 PV guest kernels can experience denial of service via SYSENTER. The SYSENTER instruction leaves various state sanitization activities to software. One of Xen's sanitization paths injects a #GP fault,
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25595 | 6.1 |
An issue was discovered in Xen through 4.14.x. The PCI passthrough code improperly uses register data. Code paths in Xen's MSI handling have been identified that act on unsanitized values read back from device hardware registers. While devices strict
|
21-11-2024 - 05:18 | 23-09-2020 - 21:15 | |
CVE-2020-25603 | 4.6 |
An issue was discovered in Xen through 4.14.x. There are missing memory barriers when accessing/allocating an event channel. Event channels control structures can be accessed lockless as long as the port is considered to be valid. Such a sequence is
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25601 | 4.9 |
An issue was discovered in Xen through 4.14.x. There is a lack of preemption in evtchn_reset() / evtchn_destroy(). In particular, the FIFO event channel model allows guests to have a large number of event channels active at a time. Closing all of the
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25602 | 4.6 |
An issue was discovered in Xen through 4.14.x. An x86 PV guest can trigger a host OS crash when handling guest access to MSR_MISC_ENABLE. When a guest accesses certain Model Specific Registers, Xen first reads the value from hardware to use as the ba
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25604 | 1.9 |
An issue was discovered in Xen through 4.14.x. There is a race condition when migrating timers between x86 HVM vCPUs. When migrating timers of x86 HVM guests between its vCPUs, the locking model used allows for a second vCPU of the same guest (also o
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25597 | 6.1 |
An issue was discovered in Xen through 4.14.x. There is mishandling of the constraint that once-valid event channels may not turn invalid. Logic in the handling of event channel operations in Xen assumes that an event channel, once valid, will not be
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25599 | 4.4 |
An issue was discovered in Xen through 4.14.x. There are evtchn_reset() race conditions. Uses of EVTCHNOP_reset (potentially by a guest on itself) or XEN_DOMCTL_soft_reset (by itself covered by XSA-77) can lead to the violation of various internal as
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25598 | 2.1 |
An issue was discovered in Xen 4.14.x. There is a missing unlock in the XENMEM_acquire_resource error path. The RCU (Read, Copy, Update) mechanism is a synchronisation primitive. A buggy error path in the XENMEM_acquire_resource exits without releasi
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25600 | 4.9 |
An issue was discovered in Xen through 4.14.x. Out of bounds event channels are available to 32-bit x86 domains. The so called 2-level event channel model imposes different limits on the number of usable event channels for 32-bit x86 domains vs 64-bi
|
21-11-2024 - 05:18 | 23-09-2020 - 22:15 | |
CVE-2020-25600 | 5.0 |
An issue was discovered in Xen through 4.14.x. Out of bounds event channels are available to 32-bit x86 domains. The so called 2-level event channel model imposes different limits on the number of usable event channels for 32-bit x86 domains vs 64-bi
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25596 | 5.0 |
An issue was discovered in Xen through 4.14.x. x86 PV guest kernels can experience denial of service via SYSENTER. The SYSENTER instruction leaves various state sanitization activities to software. One of Xen's sanitization paths injects a #GP fault,
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25595 | 5.0 |
An issue was discovered in Xen through 4.14.x. The PCI passthrough code improperly uses register data. Code paths in Xen's MSI handling have been identified that act on unsanitized values read back from device hardware registers. While devices strict
|
01-10-2020 - 06:15 | 23-09-2020 - 21:15 | |
CVE-2020-25604 | 1.9 |
An issue was discovered in Xen through 4.14.x. There is a race condition when migrating timers between x86 HVM vCPUs. When migrating timers of x86 HVM guests between its vCPUs, the locking model used allows for a second vCPU of the same guest (also o
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25597 | 5.0 |
An issue was discovered in Xen through 4.14.x. There is mishandling of the constraint that once-valid event channels may not turn invalid. Logic in the handling of event channel operations in Xen assumes that an event channel, once valid, will not be
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25602 | 5.0 |
An issue was discovered in Xen through 4.14.x. An x86 PV guest can trigger a host OS crash when handling guest access to MSR_MISC_ENABLE. When a guest accesses certain Model Specific Registers, Xen first reads the value from hardware to use as the ba
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25603 | 5.0 |
An issue was discovered in Xen through 4.14.x. There are missing memory barriers when accessing/allocating an event channel. Event channels control structures can be accessed lockless as long as the port is considered to be valid. Such a sequence is
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25598 | 5.0 |
An issue was discovered in Xen 4.14.x. There is a missing unlock in the XENMEM_acquire_resource error path. The RCU (Read, Copy, Update) mechanism is a synchronisation primitive. A buggy error path in the XENMEM_acquire_resource exits without releasi
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25599 | 5.0 |
An issue was discovered in Xen through 4.14.x. There are evtchn_reset() race conditions. Uses of EVTCHNOP_reset (potentially by a guest on itself) or XEN_DOMCTL_soft_reset (by itself covered by XSA-77) can lead to the violation of various internal as
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25601 | 5.0 |
An issue was discovered in Xen through 4.14.x. There is a lack of preemption in evtchn_reset() / evtchn_destroy(). In particular, the FIFO event channel model allows guests to have a large number of event channels active at a time. Closing all of the
|
01-10-2020 - 06:15 | 23-09-2020 - 22:15 | |
CVE-2020-25604 | 1.9 |
An issue was discovered in Xen through 4.14.x. There is a race condition when migrating timers between x86 HVM vCPUs. When migrating timers of x86 HVM guests between its vCPUs, the locking model used allows for a second vCPU of the same guest (also o
|
29-09-2020 - 19:00 | 23-09-2020 - 22:15 | |
CVE-2020-25601 | 5.0 |
An issue was discovered in Xen through 4.14.x. There is a lack of preemption in evtchn_reset() / evtchn_destroy(). In particular, the FIFO event channel model allows guests to have a large number of event channels active at a time. Closing all of the
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25599 | 5.0 |
An issue was discovered in Xen through 4.14.x. There are evtchn_reset() race conditions. Uses of EVTCHNOP_reset (potentially by a guest on itself) or XEN_DOMCTL_soft_reset (by itself covered by XSA-77) can lead to the violation of various internal as
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25597 | 5.0 |
An issue was discovered in Xen through 4.14.x. There is mishandling of the constraint that once-valid event channels may not turn invalid. Logic in the handling of event channel operations in Xen assumes that an event channel, once valid, will not be
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25595 | 5.0 |
An issue was discovered in Xen through 4.14.x. The PCI passthrough code improperly uses register data. Code paths in Xen's MSI handling have been identified that act on unsanitized values read back from device hardware registers. While devices strict
|
27-09-2020 - 02:15 | 23-09-2020 - 21:15 | |
CVE-2020-25600 | 5.0 |
An issue was discovered in Xen through 4.14.x. Out of bounds event channels are available to 32-bit x86 domains. The so called 2-level event channel model imposes different limits on the number of usable event channels for 32-bit x86 domains vs 64-bi
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25598 | 5.0 |
An issue was discovered in Xen 4.14.x. There is a missing unlock in the XENMEM_acquire_resource error path. The RCU (Read, Copy, Update) mechanism is a synchronisation primitive. A buggy error path in the XENMEM_acquire_resource exits without releasi
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25596 | 5.0 |
An issue was discovered in Xen through 4.14.x. x86 PV guest kernels can experience denial of service via SYSENTER. The SYSENTER instruction leaves various state sanitization activities to software. One of Xen's sanitization paths injects a #GP fault,
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25603 | 5.0 |
An issue was discovered in Xen through 4.14.x. There are missing memory barriers when accessing/allocating an event channel. Event channels control structures can be accessed lockless as long as the port is considered to be valid. Such a sequence is
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 | |
CVE-2020-25602 | 5.0 |
An issue was discovered in Xen through 4.14.x. An x86 PV guest can trigger a host OS crash when handling guest access to MSR_MISC_ENABLE. When a guest accesses certain Model Specific Registers, Xen first reads the value from hardware to use as the ba
|
27-09-2020 - 02:15 | 23-09-2020 - 22:15 |